Intel’s Multi-Channel DMA (MCDMA) IP extends this capability by supporting concurrent, independent DMA channels in a single core, allowing higher throughput and flexible data management. To integrate and test such IP efficiently in custom boards, developers often face the challenge of writing kernel-mode drivers, handling interrupts, and ensuring portability across operating systems.
What is Intel’s MCDMA IP?
Intel provides a suite of DMA IP cores as part of its FPGA offerings. The MCDMA IP is designed as follows:
- Each DMA channel consists of a Host-to-Device (H2D) and a Device-to-Host (D2H) queue pair.
-
Multiple DMA channels within one instance
-
Independent control over each channel
-
Parallel transfers for higher bandwidth utilization
-
Scatter-gather support for non-contiguous memory transfers
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Provides Avalon®-MM (AVMM) and Avalon®-ST (AVST) interfaces (Note: The sample currently supports only AVMM but it can be adjusted)
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Descriptor Completion: It offers per-descriptor completion notification using either MSI-X interrupts, Writebacks or polling.
- Control Registers: It provides 4 MB of control register space (mapped to PCIe BAR0) for queue control and status (QCSR), MSI-X interrupt generation, and general global control (GCSR)
In short, MCDMA brings scalability and efficiency, particularly in high-performance FPGA systems with diverse data pipelines.
Why Use WinDriver with MCDMA?
Traditionally, developers working with DMA IP would need to:
- Write kernel-mode drivers for Linux or Windows,
- Implement low-level interrupt service routines,
- Manage scatter-gather descriptors,
- Debug synchronization and memory issues.
This effort can take weeks or months and is prone to errors. Jungo WinDriver provides a cross-platform driver development kit that abstracts these complexities. With WinDriver, engineers can:
- Access FPGA DMA registers directly from user space,
- Rely on automatically generated kernel drivers,
- Use ready-made DMA samples for Intel IP cores (including MCDMA),
- Debug transfers quickly with diagnostic applications,
- Deploy drivers on Windows, Linux, or Linux ARM with minimal changes.
For the MCDMA specifically, Jungo supplies a reference sample that demonstrates:
- Initialization of DMA channels,
- Submitting scatter-gather descriptors,
- Handling channel completion interrupts,
- Monitoring transfer status,
- Gracefully stopping and restarting DMA operations.
Practical Applications
Using MCDMA with WinDriver is particularly beneficial in domains such as:
- Video Processing: Streaming multiple HD video channels simultaneously.
- Networking: Handling packet flows across parallel DMA channels.
- Data Acquisition: Collecting sensor data in real time and writing to memory without CPU bottlenecks.
- AI/ML Acceleration: Feeding large data sets to hardware accelerators with minimal host overhead.
Setting Up the MCDMA IP Sample
- Integrate the MCDMA IP in Intel Quartus Platform Designer
- Configure the IP.
- Connect the DMA and/or bypass interfaces to any peripheral to which you want to grant the host access.
- Generate HDL and program the FPGA
- Compile your design with Quartus.
- Deploy the bitstream to the FPGA board.
- Use Jungo DriverWizard
- Detect the PCIe device hosting the MCDMA.
- Generate a skeleton driver project automatically.
- Run the MCDMA Sample Code
- Jungo’s sample provides C/C++ source that demonstrates channel setup.
- Test memory-to-memory transfers.
- Observe interrupts and completion notifications via the WinDriver API.
- Debug with Diag Application
- WinDriver’s mcdma_diag lets you quickly access registers and confirm that DMA channels are active.
DMA Workflow
Allocate and Lock DMA Buffers
DMA data buffer: Allocate a buffer in user space with malloc(), then lock it for DMA using WDC_DMASGBufLock(). This buffer stores the actual data being transferred.
DMA descriptor buffer: Allocate and lock a contiguous buffer using WDC_DMAContigBufLock(). This buffer is configured by the software and holds transfer metadata (e.g., source and destination addresses, block size, completion control, etc.).
Write-back buffer: (if using write-back completion): Allocate and lock an additional contiguous buffer with WDC_DMAContigBufLock(). This buffer is used by the hardware to store the write-back data.
Configure DMA Descriptors
Configure the transfer descriptors: Populate each descriptor with the required metadata (e.g., source and destination addresses, block length, control fields).
Initialize the queue: Write the base address and total size of the descriptor buffer into the appropriate QCSR registers.
The descriptor is structured as follows:
Initiating the DMA Transfer
The transfer is initiated by updating Q_TAIL_POINTER with the index of the last valid descriptor.
Completion and Interrupt Handling
When the last descriptor completes, one of the following occurs:
- Device register polling: The hardware updates
Q_COMPLETED_POINTERwith the index of the last completed descriptor. - Host memory polling (write-back): The hardware writes the index of the last completed descriptor to host memory at the address specified by
Q_CONSUMED_HEAD_ADDR_L/Q_CONSUMED_HEAD_ADDR_H. - MSI-X interrupts: The hardware raises an interrupt and writes the index of the last completed descriptor to host memory at the address specified by
Q_CONSUMED_HEAD_ADDR_L/Q_CONSUMED_HEAD_ADDR_H.
Cleanup (DMA Close Routine)
Upon transfer completion, the driver must unlock the DMA buffers, release the associated memory, and reset the device registers state.
Key API Interactions
The WinDriver API for DMA abstracts low-level register programming. For example:
WDC_DMASGBufLock()– Used to build the DMA data scatter-gather buffer.WDC_DMAContigBufLock()– Used to build the descriptors list.- Event-handling callbacks tie into channel completion interrupts.
Intel® Stratix® 10 GX
A flagship platform for high-performance designs, including data center acceleration, AI/ML workloads, and real-time signal processing. Fully supports Avalon-MM DMA IP via Qsys.
FPGA Device:
2.8 million logic elements (LEs), 229 Mb of M20K memory
PCIe Interface:
Supports DMA to/from host system memory at high throughput
Memory:
2 × 8 GB DDR4 DIMMs, 72-bit (ECC) with ~25.6 GB/s bandwidth
Transceivers & Expansion:
Up to 96 transceivers @ 17.4 Gbps
Intel® Agilex® 7 FPGAs
High-performance processor interfaces and bandwidth-intensive applications.
Logic Elements (LEs):
Up to 4 million
Transceivers:
Up to 116 Gbps
PCIe Interface:
PCIe 5.0 x16
Memory:
Supports DDR4
Intel® Agilex® 5
Ideal for high-performance applications such as data center acceleration, AI/ML workloads, networking, and real-time signal processing.
Logic Elements (LEs):
Up to 2.8 million LEs
Transceivers:
Up to 112 Gbps (supporting both PAM4 and NRZ signaling)
PCIe Interface:
PCIe 5.0 x16
Memory:
Supports DDR4 and DDR5 with a memory controller for high bandwidth (up to 16 GB of HBM2 supported in certain configurations)
Full Benefits
Guidance
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Technical Data
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-windrvr1640.sys
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-wdapi1640.dll
-wdapi1640_32.dll
-wdapi1640_arm64.dll
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-wdapi_netcore1640.dll
-wdapi_java1640.dll
-wdapi_java1640.jar
-wdreg.exe
-difxapi.dll
-devcon.exe
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-wdapi_java1630.dll wdapi_java1600.jar
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Linux:
-windrvr_gcc_v3.o_shipped
-windrvr_gcc_v3_regparm.o_shipped
-kp_linux_gcc_v3.o
-kp_linux_gcc_v3_regparm.o
-libwdapi1640.so libwdapi1640_32.so
-libwdapi_java1640.so
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-wdapi_java1640.jar
-wdapi_netcore1640.dll
-kp_wdapi1640_gcc_v3.o_shipped
-kp_wdapi1640_gcc_v3_regparm.o_shipped
-linux_wrappers.c
-linux_wrappers.h
-wdusb_linux.c
-wdusb_interface.h
-wd_ver.h
-linux_common.h
-windrvr.h
-windrvr_usb.h
-wdsriov_interface.h
-wdsriov_linux.c
-wdreg
-configure makefile.in
-configure.wd makefile.wd.in
-makefile.wd.kbuild.in
-configure.usb
-makefile.usb.in
-makefile.usb.kbuild.in
-setup_inst_dir
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-kp_linux_gcc_v2.o kp_linux_gcc_v3.o kp_linux_gcc_v3_regparm.o
-libwdapi1630.so
-libwdapi_java1630.so wdapi_java1600.java
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-linux_wrappers.c linux_wrappers.h wdusb_linux.c
-wdusb_interface.h wd_ver.h linux_common.h windrvr.h windrvr_usb.h
-configure.wd makefile.wd.in makefile.wd.kbuild.in
-configure.usb makefile.usb.in makefile.usb.kbuild.in
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-libwdapi_java1640.jar
-libwdapi_java1640.dyld
-wdapi_netcore1640.dll
-WinDriver1640.kext
-WinDriver1640.dext
-wd_mac_install.sh
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